Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate
2007-02-13
2007-02-13
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Precharge
C365S233100, C365S189070
Reexamination Certificate
active
10991729
ABSTRACT:
Methods for controlling the timing of a pre-charge operation in a memory device are provided. In embodiments of the present invention, the timing may be controlled by dynamically selecting a word line off time based on information about a number of column cycles. This may be accomplished, for example, by routing a word line disable signal via one of a first plurality of delay paths. The methods may further include dynamically selecting a bit line equalization start time based on the information about the number of column cycles. This may be accomplished, for example, by routing a bit line equalization start signal via one of a second plurality of delay paths. Pursuant to still further embodiments of the present invention, systems for controlling timing in a memory device are provided which include a control circuit that is configured to select a word line off time from a plurality of word line off times in response to a word line signal and information about a number of column cycles.
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Notice to Submit Response, Korean Application No. 10-2003-0087535, Aug. 31, 2005.
Elms Richard
Myers Bigel & Sibley & Sajovec
Nguyen Dang
Samsung Electronics Co,. Ltd.
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