Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2008-03-04
2008-03-04
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S168000
Reexamination Certificate
active
07340560
ABSTRACT:
A method of accessing an integrated circuit memory device can include reading from an address in a first memory sub-block during a first clock cycle. The address of a first data memory block address mapped to the first memory sub-block can be written to during the first clock cycle. The address of a second data memory block address mapped can be written to the second memory sub-block during a second clock cycle immediately subsequent in time to the first clock cycle. Related device are disclosed.
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Notice to Submit a Response for Korean patent application No. 10-2003-0051120 mailed on May 30, 2005.
Kwak Cheol-Shin
Lee Byong-Kwon
Park Chul-Sung
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronics Co,. Ltd.
Verbrugge Kevin
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