Methods and apparatus for treating a semiconductor substrate

Details Methods and apparatus for treating a semiconductor substrate Methods and apparatus for treating a semiconductor substrate

1999-02-17

2001-06-05

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S781000, C438S789000

Reexamination Certificate

active

06242366

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to methods and apparatus for treating a semiconductor substrate, such as a semi-conductor wafer, and, in particular, but not exclusively, to methods and apparatus for providing a low dielectric constant (known as low k) layer in a planarisation or gap filling operation.
In our earlier co-pending patent application WO94/01885, the contents of which are incorporated herein by reference, we describe a planarisation technique in which a liquid short-chain polymer is formed on a semiconductor wafer by reacting silane (SiH
4
) with hydrogen peroxide (H
2
O
2
). The polymer, which initially is in a liquid state, is formed on to a wafer to produce planarisation either locally or globally, or gap filling. This technique provides a planarisation or gap filling layer of silicon dioxide and we have found it to be a most suitable material for semiconductor circuit manufacturing.
SUMMARY OF THE INVENTION
However, with the ever increasing demands to enhance device speed and reduce size, there can be problems in more advanced devices with using silicon dioxide as the dielectric insulator between metal lines. The RC time constant associated with the metal lines (or interconnects) on an integrated circuit structure limits the device speed and is a function of the resistance of the interconnections, the thickness of the insulator and its dielectric constant.
Thus in order to reduce the RC time constant and enhance device speed, the options are to modify the characteristics of the interconnect, or the insulator. There are many device design constraints, and practicalities which restrict the designer's freedom and thus we believe it is extremely important to reduce the dielectric constant of the insulator, whilst trying to retain the other desirable properties which make silicon dioxide a suitable material.
For advanced semiconductor devices, dielectric constant values of <3.5 are required and ideally are <3.0. We have found that it is possible to provide a dielectric layer which substantially retains the desirable properties of silicon dioxide but which has a significantly reduced dielectric constant, thereby making it suitable for use in advanced logic devices.
We have also found that the dielectric constant can be reduced by applying a particular set of process conditions.
Accordingly, in one aspect of this invention, there is provided a method of treating a semiconductor substrate, comprising forming on the substrate a liquid short-chain polymer of the general formula R
a
Si(OH)
b
or R
a
SiH
b
(OH)
c
where a+b=4 or a+b+c=4 respectively; a, b and c are integers, R is a carbon-containing group and Si—C bonding is inferred.
The reference to the polymer being ‘liquid’ is simply intended to indicate that it is neither gaseous nor solidified at the moment of formation.
Preferably R is a methyl, ethyl, phenyl or vinyl group, with methyl (CH
3
—) being particularly preferred.
The further polymerisation may be enhanced by heating. It is thought that the liquid short chain polymer undergoes further polymerisation reactions to form an amorphous structure of the general formula
—(R
x
Si O
y
)n—where x+y=4
x and y are integers
R is a carbon-containing group
n=1 to ∞
Si—C bonding is inferred
In another aspect of this invention there is provided a method of treating a semiconductor substrate, which comprises positioning the substrate in a chamber;
introducing into the chamber in the gaseous or vapour state an organosilane containing compound with the general formula C
x
H
y
—Si
n
H
a
, and a further compound, containing peroxide bonding, and
reacting the organosilane compound with said further compound to provide on said substrate a short-chain polymer.
According to this invention a liquid short-chain polymer layer is formed on the substrate, the polymer being carbon doped to reduce the dielectric constant of the formed layer. The layer is formed by reacting a silicon containing compound with a compound containing peroxide bonding, and the dopant material may be bound to or otherwise associated with one of the reactants, preferably to the silicon containing gas.
The term peroxide bonding includes hydroperoxide bonds such as O—OH.
Preferably said silicon-containing compound is of the general formula R—SiH
3
; R may be a methyl, ethyl, phenyl or vinyl group with methyl (CH
3
—) being particularly preferred. Si—C bonding is inferred. Preferably said silicon-containing compound and said further compound may react in a surface reaction on the surface of the substrate. Further polymerisation of the polymer may take place to form an amorphous structure of the general Formula
—(R
x
SiO
y
)
n
with the constraints set out above. Further polymerisation may be enhanced by radiative or chemical treatment e.g. by heating.
Preferably the dielectric constant, measured at 1 MHz, of said deposited material is less than 3.5 and more preferably less than 3.
The deposition rates may be enhanced by use of a weakly ionized plasma within the process chamber. However, this may be at the expense of Si—C bonding and thus the resultant dielectric constant of the deposited layer may be higher than if a plasma had not been used, but it will still be usefully lower than an un-doped silicon dioxide layer.
Thus, with some silicon-containing precursors, the use of a plasma enhances the deposition rate without significant detriment to the planarity of the deposited polymer.
The method may further comprise forming or depositing an under layer or base layer prior to the deposition of the polymer layer. The base layer is preferably deposited using a Chemical Vapour Deposition (CVD) or Plasma Enhanced Chemical Vapour Deposition process (PECVD) before the depositing of the polymer layer. The PECVD or CVD process is preferably carried out in a separate chamber to that in which the polymer layer is deposited, but can be carried out in the same chamber. The under layer may be a doped or un-doped silicon dioxide or other silicon containing layer.
The method may further comprise depositing or forming a capping layer on the surface of the formed layer. This layer is preferably applied in a PECVD process.
Preferably said PECVD or CVD capping process is applied in a chamber separate to that in which the polymer layer is formed. The capping layer may be a doped or un-doped silicon dioxide or other silicon containing layer.
Preferably the PECVD or CVD chamber comprises a platen for supporting the substrate which is maintained at a temperature in the range of from 100° C.-450° C., and more preferably around 350° C.
The method may further comprise chemical or radiative treatment (e.g. heating) of the polymer layer and this heating preferably takes place after capping, as the cap provides mechanical stability for the polymer layer during cross-linking. The polymer layer may be heated to 350° C.-470° C. for 10 to 60 minutes. For example the heating may last 30 minutes at 400° C. The heating may be achieved using a furnace, heat lamps, a hot plate, or plasma heating. The heat treatment step removes excess water from the layer, which is a by-product of the cross-linking reaction. It may also remove SiOH bonds.
In another aspect, the invention provides a method of treating a semiconductor substrate, which comprises positioning the substrate into a chamber, introducing into the chamber in the gaseous or vapour state an organosilane compound of the general formula (C
x
H
y
)
z
Si
n
H
a
, and a further compound containing peroxide bonding and reacting the silicon-containing compound with said further compound.
In another aspect, this invention provides apparatus for implementing the method as described above which comprises a CVD chamber and PECVD chamber, said CVD chamber having means for introducing therein two or more reaction gases or vapours, platen means for supporting a semiconductor substrate, and means for maintaining the temperature of the platen at a required level, said PECVD or CVD chamber including platen means for supporting a semico

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