Method to increase DRAM cell capacitance

Details Method to increase DRAM cell capacitance Method to increase DRAM cell capacitance

1997-11-21

2000-12-12

Whitehead, Jr., Carl

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438255, 438396, 438398, H01L 218242

Patent

active

061597880

ABSTRACT:
An electrode for a DRAM charge storage capacitor is provided with a textured surface using a wet etching process that has far greater process latitude and a lower cost than conventional processes for forming hemispherical grained silicon. A base capacitor electrode is provided for a DRAM cell preferably having a conventional polysilicon surface on which the textured surface will be formed. A layer of polycrystalline material having a composition different from the polysilicon surface is provided over the polysilicon surface. The layer of polycrystalline material is subjected to a wet etching process which preferentially etches along the grain boundaries of the layer of polycrystalline material. This wet etching process removes portions of the layer of polycrystalline material from over the polysilicon surface. The remaining portions of the layer of polycrystalline material are then used as a mask for etching the surface of the polysilicon, introducing a texture to the surface of the polysilicon layer. The surface of the polysilicon layer is then cleaned and a capacitor dielectric and upper capacitor electrode are provided over the textured polysilicon surface.

REFERENCES:
patent: 5134086 (1992-07-01), Ahn
patent: 5350707 (1994-09-01), Ko et al.
patent: 5401681 (1995-03-01), Dennison
patent: 5795806 (1998-08-01), Tseng

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