Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
2000-07-14
2002-04-16
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S680000, C438S769000, C438S954000, C257S639000, C501S087000
Reexamination Certificate
active
06372661
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to fabricating semiconductor devices and specifically to methods of forming low dielectric constant (low-k) materials used in fabricating semiconductor devices.
BACKGROUND OF THE INVENTION
Advances in IC technology has further decreased the design rule, or device size, in semiconductor device fabrication. To that end, inter-layer and intermetal layers, or films, within semiconductor devices are sought that have low dielectric constants to improve performance and reliability of such devices.
The press release entitled “International Sematech Validates Manufacturing Capability of Applied Material's Low-k Solution for Copper Interconnects—Successful Results Achieved with BLACK DIAMOND for Production of Sub-0.18 Micron Chips,” Applied Materials, Feb. 28, 2000, describes a successful evaluation of Applied Materials, Inc.'s BLACK DIAMOND™ material (a family of low-k products deposited using the DLK chamber) for production of advanced interconnect structures in copper sub-0.18 micron devices.
U.S. Pat. No. 5,661,093 to Ravi et al. describes a method for depositing a halogen-doped oxide film having a low dielectric constant that is resistant to outgassing of the halogen dopant and moisture absorption, and also retains these properties during subsequent processing steps. A halogen-doped layer is deposited by introducing process gasses into a processing chamber, including a halogen-containing source gas. The process gas combination is changed and a sealing layer is deposited that seals the dopant within the halogen-doped layer. The sealing layer may be comprised of a carbon-rich layer or an undoped layer.
U.S. Pat. No. 5,926,740 to Forbes et al. describes a method of forming a graded anti-reflective coating (ARC) for integrated circuit (IC) lithography. A substantially continuously graded composition silicon oxycarbide (SiOC) anti-reflective coating or anti-reflective layer (ARL) is interposed between a photoresist layer and an underlying substrate. The ARC composition is graded from SiOC at the ARC—photoresist interface, to SiC or Si in a direction away from the photoresist. Reflections at the ARC-photoresist interface are substantially eliminated, substantially all incident light, including UV and DUV light, is absorbed in the ARC, and substantially no light reaches or is reflected from the underlying substrate. Photolithographic limitations such as swing effect and reflective notching are reduced.
U.S. Pat. No. 5,804,259 to Robles describes a method of forming a multilayer insulating film on a substrate by forming a number of carbon-based layers on the substrate. Each such layer interlaid with layers of organic material such as parylene. The carbon-based layers are preferably formed using a high-density plasma (HDP) chemical vapor deposition (CVD) although other CVD systems may be used.
U.S. Pat. No. 5,300,460 to Collins et al. describes an ultra-high frequency (UHF)/very-high frequency (VHF) plasma used in forming IC structures. The UHF/VHF plasma is generated by a UHF/VHF power source at a frequency from about 50 to 800 MHz. Low or high pressure plasma-assisted etching or deposition processes at respective pressure limitations. The electrode sheath voltages are maintained sufficiently low so as to avoid damaging wafer structures yet high enough to permit initiation of the processes without the need for supplemental power sources. Microloading effects may also be reduced or eliminated by operating within the 50 to 800 MHz frequency range.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method of forming CVD low dielectric constant material having improved crack resistance.
Another object of the present invention is to provide a method of forming up to and over 3 &mgr;m thick CVD low dielectric constant material having improved crack resistance.
Yet another object of the present invention is to provide a method of forming improving the crack resistance of CVD low dielectric constant material having without sacrificing the low dielectric constant characteristic of the material.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, in the first embodiment, MeSiH
3
, N
2
O, and N
2
are reacted at a molar ratio of from about 1:2:10 to 1:10:15, at a pressure from about 0.3 to 4 torr, at a temperature from about 17 to 400° C., and at a plasma power from about to 400 watts (W), and more preferably from about 200 to 300 W, to deposit a final deposited film. The final deposited film is then treated to stabilize the final deposited film to form a CVD low-k SiOCN material. In the second embodiment, a starting mixture of MeSiH
3
, SiH
4
, N
2
O, and N
2
is reacted at a molar ratio of from about 1:1:2:10 to 1:5:10:15, at a pressure from about 0.3 to 4 torr, at a temperature from about 380 to 420° C., and in a plasma in a helium carrier gas at a plasma power from about 0 to 400 W, and more preferably from about 200 to 300 W, to deposit a CVD low-k SiOCN material.
REFERENCES:
patent: 5300460 (1994-04-01), Collins et al.
patent: 5530581 (1996-06-01), Cogan
patent: 5661093 (1997-08-01), Ravi et al.
patent: 5804259 (1998-09-01), Robles
patent: 5926740 (1999-07-01), Forbes et al.
patent: 6054379 (2000-04-01), Yau et al.
patent: 6159871 (2000-12-01), Loboda et al.
patent: 6284149 (2001-09-01), Li et al.
patent: 6303523 (2001-10-01), Cheung et al.
patent: WO99/63591 (1998-05-01), None
Press release—“International Sematech Validates Manufacturing Capability of Applied Materials's Low-k Solution for Copper Interconnects Successful Results Achieved with Black Diamond for Production of Sub. 0.18 Micron Chips,” Applied Materials, Feb. 28, 2000.
Jeng Shwang Ming
Li Lain Jong
Lin Cheng Chung
Ackerman Stephen B.
Everhart Caridad
Lee Jr. Granvill D
Saile George O.
Stanton Stephen G.
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