Method of trench sidewall enhancement

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S386000, C257S301000

Reexamination Certificate

active

06706586

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor integrated circuits and, more particularly, to the fabrication of integrated circuits requiring deep trenches.
BACKGROUND OF THE INVENTION
A memory cell in an integrated circuit comprises a transistor with an associated capacitor. The capacitor consists of a pair of conductive layers separated by a dielectric material. Information or data is stored in the memory cell in the form of charge accumulated on the capacitor. As the density of integrated circuits with memory cells is increased, the area for the capacitor becomes smaller and the amount of charge it is able to accumulate is reduced. Thus, with less charge to detect, reading the information or data from the memory cell becomes more difficult.
With increasing levels of integration in semiconductor chips or dies in a wafer, such as those with a silicon substrate, greater demands are placed on the method of fabricating the semiconductor chips, such as making smooth, straight-walled deep trenches especially for use a capacitors. The deep trenches are dry etched using HBr, O
2
, NF
3
and SF
6
as the plasma gases. However, if the only fluorinated gas is used NF
3
as the etching gas, the deep trench is formed with a controlled narrow profile but with zagged sidewalls which may generate crack propagation and cause merging with adjacent trenches. With increased level of integration or decreased ground rules, this cracking problem becomes even more acute. By using SF
6
as the only fluorinated gas in etching the trenches, shallow trenches with broad profiles are undesirably obtained but with desirable smooth sidewalls. Again, with decreasing ground rules, broad profiles can cause trench mergers and will not give the required capacitance for trench capacitor application. When NF
3
and SF
6
are used together, the etching is difficult to control and blowouts, in the substrate being etched, occur most likely due to one gas dominating over the other. Both NF
3
and SF
6
are known in the prior art and are disclosed in U.S. Pat. No. 5,935,874 as etchant gases for forming deep trenches in a substrate such as silicon. The etchant plasma of this patent with either of these fluorine containing gases mandates the use of a high percentage helium in the plasma. HBr also is known for use as an etchant gas in forming high aspect ratio, deep trenches as disclosed in U.S. Pat. No. 6,127,278 in a multi step process in which HBr and O
2
is used in the first step and a fluorine containing gas is added to the second step to increase the etch rate of the substrate. If desired, the patent states that a small amount of a fluorine-containing gas such as NF
3
, SF
6
, SiF
4
, Si
2
F
6
and the like can be added in a very small amount to the etchant gases in the first step. However, the patent does not state that the fluorine-containing gas must be different from the fluorine-containing gas of the second step. The first etching step deposits a passivation layer on the sidewalls of the opening and produces a taper in the sidewalls at the top of the trench. Neither of these patents nor any of the known prior art teaches how to combine NF
3
with SF
6
to obtain a controlled narrow-profiled deep trench with smooth sidewalls without a blowout of the substrate.
SUMMARY OF THE INVENTION
Accordingly, it is object of the present invention to be able to form controlled narrow-profiled deep trench with smooth sidewalls. Another object of the present invention is to use both NF
3
and SF
6
as etchants for forming a deep trench but without risking a blowout of the substrate. To achieve these and other objects, the present invention comprises etching of the deep trench by alternating these two etchant gases, one without the other. Preferably, the substrate is first etched at one or more mask openings with NF
3
without SF
6
for a period of time followed by the removal of NF
3
and the etching of the trench in the substrate at the one or more mask openings with SF
6
without the NF
3
for a further period of time. The alternating etching steps are repeated until the desired etch deep of the trench in the substrate is achieved. If desired, the order of the NF
3
and SF
6
etchant gases can be reversed in etching the trench. Thus, a smooth sidewalled, narrow-profiled trench is formed without any possibility of a blowout in the substrate because NF
3
and SF
6
are not combined together during etching of the trench.


REFERENCES:
patent: 4131496 (1978-12-01), Weitzel et al.
patent: 4775550 (1988-10-01), Chu et al.
patent: 5258332 (1993-11-01), Horioka et al.
patent: 5935874 (1999-08-01), Kennard
patent: 6020270 (2000-02-01), Wong et al.
patent: 6066566 (2000-05-01), Naeem et al.
patent: 6069091 (2000-05-01), Chang et al.
patent: 6103635 (2000-08-01), Chau et al.
patent: 6127278 (2000-10-01), Wang et al.
patent: 6165854 (2000-12-01), Wu
patent: 6221784 (2001-04-01), Schmidt et al.
patent: 6303513 (2001-10-01), Khan et al.
patent: 6387773 (2002-05-01), Engelhardt
patent: 6544838 (2003-04-01), Ranade et al.

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