Method of testing a multichip

Details Method of testing a multichip Method of testing a multichip

2007-11-14

2009-12-08

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07631238

ABSTRACT:
A multichip and method of testing a multichip, the multichip including a control chip having a central processing unit (CPU) and a plurality of memories, each memory of the plurality of memories storing information related to testing the multichip, comprises connecting one of the memories to the control chip; reading, by the CPU, stored memory information from the connected one of the memories to confirm the connected one of the memories; generating a test pattern relating to the connected one of the memories confirmed by the CPU, and testing the connected one of the memories according to the test pattern.

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