Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-11-01
2005-11-01
Vu, Hung (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S592000, C438S595000, C438S631000, C438S636000
Reexamination Certificate
active
06960523
ABSTRACT:
An etch rate of a nitride liner layer is improved relative to an etch rate of a nitride cap layer. The nitride liner layer is located at an exposed portion of a substrate adjacent to a stacked structure also located atop the substrate. The nitride cap layer is located atop the stacked structure. An oxide spacer is formed along sidewalls of the stacked structure. The nitride liner layer is patterned and etched to form at least one opening therein to the substrate while the nitride cap layer remains substantially intact.
REFERENCES:
patent: 6165839 (2000-12-01), Lee et al.
patent: 6221714 (2001-04-01), Jang
patent: 2002/0030234 (2002-03-01), Ohuchi et al.
Benedict John
Dev Prakash C.
Dobuzinsky David
Faltermeier Johnathan
Maldei Michael
Infineon Technolgies AG
International Business Machines - Corporation
Slater & Matsil L.L.P.
Vu Hung
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