Method of reducing coupling between floating gates in...

Details Method of reducing coupling between floating gates in... Method of reducing coupling between floating gates in...

2011-03-22

2011-03-22

Lebentritt, Michael S (Department: 2829)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S201000, C257S315000, C257SE21680, C257SE29129

Reexamination Certificate

active

07910434

ABSTRACT:
A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.

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