Method of producing the source regions of a flash EEPROM memory

Details Method of producing the source regions of a flash EEPROM memory Method of producing the source regions of a flash EEPROM memory

1998-03-19

2000-07-18

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438259, H01L 21336

Patent

active

060906650

ABSTRACT:
The field insulation in a flash memory cell is provided by an oxide/polysilicon/oxide sandwich. The memory cell area is reduced by dopant implantation, self-aligned with respect to the word lines of two adjacent memory cells, for producing the source regions and source connections. The field insulation produces a capacitance between the doping region and the polysilicon layer of the insulation layer which improves the read characteristic of the memory cell.

REFERENCES:
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patent: 4990979 (1991-02-01), Otto
patent: 5661057 (1997-08-01), Fujiwara
patent: 5807778 (1998-09-01), Lee
patent: 5858821 (1999-01-01), Dennison et al.
patent: 5861333 (1999-01-01), Lin
patent: 5888870 (1999-03-01), Gardner et al.
patent: 5930619 (1999-07-01), Noble
patent: 5930627 (1999-07-01), Zhou et al.
International Publication No. 83/03167 (Angle), dated Sep. 15, 1983.

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