Method of producing an integrated circuit having a capacitor...

Details Method of producing an integrated circuit having a capacitor... Method of producing an integrated circuit having a capacitor...

2007-01-31

2010-06-01

Brewster, William M. (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S393000, C438S717000

Reexamination Certificate

active

07727837

ABSTRACT:
A method of forming an integrated circuit having a capacitor is disclosed. In one embodiment, the method includes forming a capacitor element with a first electrode, a dielectric layer and a second electrode. The capacitor element is formed using a support layer.

REFERENCES:
patent: 5998100 (1999-12-01), Azuma et al.
patent: 6201273 (2001-03-01), Wang et al.
patent: 6667502 (2003-12-01), Agarwal et al.
patent: 7067385 (2006-06-01), Manning
patent: 2005/0245022 (2005-11-01), Gutsche et al.
“A Mechanically Enhanced Storage node for virtually unlimited Height (MESH) Capacitor Aiming at sub 70nm DRAMS”, by D.H. Kim, et al., IEEE, 2004.
“Novel Robust Cell Capacitor (Leaning Exterminated Ring type Insulator) and New Storage Node Contact (Top Spacer Contact) for 70nm DRAM technology and beyond”, by J.M. Park, et al., 2004 Symposium on VLSI Technology, IEEE 2004.

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