Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2001-01-12
2004-09-28
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S784000, C438S787000, C438S788000
Reexamination Certificate
active
06797646
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the manufacture of integrated circuits. Specific embodiments of the invention are directed to nitrogen doping of FSG films for use in such circuits.
In conventional integrated circuit fabrication, circuit elements are formed by etching a pattern of gaps in a layer of metal, which are then filled with a dielectric. As efforts continue to include ever greater levels of integration on semiconductor chips, there has developed a persistent need to make circuit components (such as transistors, capacitors, etc.), smaller, bringing the components closer together, thereby allowing a greater number of components per unit of chip area. Increasing the component density on semiconductor chips results in increased sensitivity of operating speed and power consumption on the dielectric constant k of the material used to insulate the electrically conductive structures. If the dielectric constant is too high, the capacitance between the chip's metal lines becomes too large, creating undesirable cross talk across layers.
Various forms of silicon oxide or silicon-oxide-based glass are commonly used as the insulating material in integrated-circuit fabrication. While silicon oxide has an acceptably low dielectric constant for many applications, a lower dielectric constant is preferable for some applications, such as those involving a high density of circuit components. The RC time delay increases with an increase in the resistance of the conductive layers, such as metal lines, and with an increase in the capacitance which exists as insulating material sandwiched between conducting films (R is resistance, C is capacitance). The parasitic capacitance between interconnections leads to degradation in switching speeds and causes cross talk between adjacent signal lines. Lowering the dielectric constant reduces RC time delays by decreasing the capacitances, contributing to an overall improvement in the circuit's operation speed. One method of forming an insulator with a lower dielectric constant than undoped silicate glass (“USG”) involves adding fluorine to silicon oxide during a chemical-vapor-deposition (“CVD”) process. The presence of the fluorine dopants in the resulting fluorinated silicate glass (“FSG”) is known to have the desired lowering effect on dielectric constant.
Another factor to be considered in developing methods for depositing films with appropriate dielectric constant is that copper, which has lower resistance than conventional aluminum alloys, is poised to take over as the main on-chip conductor for all types of integrated circuits. It is more difficult to etch copper than aluminum and a specialized process, referred to as a “damascene process,” has been developed for the fabrication of copper-based integrated circuits. In damascene processes, dielectric layers are first deposited as an integrated stack, which is then etched to form gaps to be subsequently filled with the conductive material. A barrier layer, which can be overlying or underlying, is commonly included to prevent diffusion of copper into adjacent dielectric layers. Some integrated stacks used in damascene processes also use a layer known as an “etch stop” or “hardmask” to provide for selective etching of the film. Silicon nitride (Si
x
N
y
) is a material commonly used for such applications, for example when forming vias between layers containing metal lines.
The use of FSG can present adhesion problems. For instance, adhesion problems have arisen at the interface between the FSG layer and the barrier layer formed in the damascene process prior to forming the bulk copper layer. Bubbling and even peeling have been observed for barrier layers containing, for example, tantalum (Ta), tantalum nitride (TaN), or the like. It is believed that the fluorine in the FSG layer diffuses into the barrier layer and attacks and corrodes the barrier layer, resulting in poor adhesion.
SUMMARY OF THE INVENTION
Embodiments of the present invention provide nitrogen doping of an FSG layer to form a nitrogen-containing FSG layer with improved adhesion to layers such as barrier layers. In some embodiments, a nitrofluorinated silicate glass (NFSG) layer having nitrogen dopants distributed generally over the entire layer is formed on a substrate by CVD of a gaseous mixture of silicon-containing, fluorine-containing, oxygen-containing, and nitrogen-containing gases. In some embodiments, an FSG film that has been formed is doped with nitrogen by a plasma treatment using a nitrogen-containing chemistry. For instance, the nitrogen plasma treatment may occur during ashing of the photoresist after etching to form trenches or vias and prior to forming the barrier layer in a damascene process. Such a film has nitrogen dopants localized near the surface subjected to the doping treatment.
The nitrogen-containing FSG layer exhibits excellent adhesion to an overlying or underlying barrier layer as may be required in certain applications. Moreover, the NFSG layer exhibits a reduction in dielectric constant, which may be attributable to the inclusion of nitrogen dopants in the film that is believed to allow higher fluorine concentrations in the layer without sacrificing film stability. The enhanced stability exhibited by the film lessens integration concerns that otherwise exist with both FSG and USG. Various embodiments of the invention are applicable to damascene and other applications such as gap-fill applications.
In accordance with an aspect of the present invention, a method for depositing a layer on a substrate in a process chamber includes supplying a gaseous mixture to the process chamber. The gaseous mixture has a silicon-containing gas, a fluorine-containing gas, an oxygen-containing gas, and a nitrogen-containing gas. Energy is provided to the gaseous mixture to deposit a nitrogen-containing fluorinated silicate glass layer onto the substrate. In some embodiments, a plasma is formed from the gaseous mixture to deposit the layer. A barrier layer is formed on the nitrogen-containing fluorinated silicate glass layer, and a metal layer is formed on the barrier layer. The barrier layer may include copper, and the barrier layer may include tantalum, tantalum nitride, or the like.
In accordance with another aspect of the invention, a method of forming a layer on a substrate in a process chamber includes forming a fluorinated silicate glass layer over the substrate. A patterned photoresist layer is formed over the fluorinated silicate glass layer. The fluorinated silicate glass layer is etched according to the patterned photoresist layer. The method further includes removing the photoresist layer and substantially simultaneously introducing nitrogen dopants into the fluorinated silicate glass layer by subjecting the photoresist layer and the fluorinated silicate glass layer to a plasma formed from a nitrogen-containing gas. In some embodiments, the plasma contains no oxygen species.
The methods of the present invention may be embodied in a computer-readable storage medium having a computer-readable program embodied therein for directing operation of substrate processing system. Such a system may include a process chamber, a plasma generation system, a substrate support, a gas delivery system, and a system controller. The computer-readable program includes instructions for operating the substrate processing system to form a thin film on a substrate disposed in the processing chamber in accordance with the embodiments described above.
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Baliga, John, “New Materials Enhance Memory Performance,”Semiconductor International(Nov. 1999) pp.:79-90.
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Peters, Laura, “Pursuing the Perfect Low-k Dielectric,”Semiconductor International(Sep. 1998) pp.: 64-
Bencher Christopher D.
Chen Peter
Feng Joe
Ngai Christopher
Applied Materials Inc.
Brewster William M.
Townsend & Townsend & Crew
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