Method of manufacturing split-gate memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S264000, C438S266000

Reexamination Certificate

active

06977200

ABSTRACT:
A method of manufacturing split-gate memory provides a control gate insulating film and the tunneling insulating film in a cell region, a high voltage gate insulating film in a high voltage region, and a low voltage gate insulating film in a low voltage region, all having different thickness. Additionally, a pre-cleaning process removes an outer sidewall portion of a spacer to form a tip portion of a floating gate that overlaps a control gate line formed proximate the floating gate.

REFERENCES:
patent: 6348378 (2002-02-01), Lee
patent: 6649471 (2003-11-01), Cho et al.
patent: 6683340 (2004-01-01), Kim et al.
patent: 6756629 (2004-06-01), Furuhata
patent: 2004/0248367 (2004-12-01), Shyu et al.
patent: 10-0275220 (2003-02-01), None
patent: 2003-0027393 (2003-04-01), None

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