Method of manufacturing semiconductor integrated circuit...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S256000, C438S396000, C438S399000, C438S638000

Reexamination Certificate

active

06969649

ABSTRACT:
A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.

REFERENCES:
patent: 5279989 (1994-01-01), Kim
patent: 5296400 (1994-03-01), Park et al.
patent: 5389560 (1995-02-01), Park
patent: 5554557 (1996-09-01), Koh
patent: 5569948 (1996-10-01), Kim
patent: 5677227 (1997-10-01), Yang et al.
patent: 5688713 (1997-11-01), Linliu et al.
patent: 5710073 (1998-01-01), Jeng et al.
patent: 5914279 (1999-06-01), Yang et al.
Provisional U.S. Appl. No. 60/017,065, Yang, et al., filed Apr. 26, 1996.

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