Method of manufacturing semiconductor devices

Details Method of manufacturing semiconductor devices Method of manufacturing semiconductor devices

2002-02-27

2004-01-06

Picardat, Kevin M. (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S231000, C438S301000, C438S525000

Reexamination Certificate

active

06673685

ABSTRACT:

This application claims the benefit of Japanese Patent Application No. 2001-269636, filed Sep. 6, 2001 and incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process for fabrication of semiconductor devices typified by memory LSI and system LSI. More particularly, the present invention relates to a process for efficiently forming a gate electrode of CMOS in a reduced length below 50 nm which is beyond the limit of lithography resolution.
2. Description of the Related Arts
Semiconductor devices fall under two broad categories: memory LSI typified by DRAM and logic LSI (or system LSI) typified by microprocessor (MPU). They are fabricated by several steps, including the formation of a gate electrode. This step consists of forming a gate insulating film, forming a gate electrode film, forming a mask layer, transferring a circuit pattern to the mask layer, etching the gate electrode film, ashing a resist and removing residual halogen gas, and removing (or cleaning) foreign matter (particles) resulting from etching. After the gate electrode has been formed, source and drain regions are formed.
The film-forming step differs in detail depending on the construction of the gate electrode. Usually, the gate insulating film is a thin SiO
2
film, and the gate electrode film is a single layer of n-poly-Si or p-poly-Si or a multiple layer of WSi/poly-Si or W/WN/poly-Si. The etching of these films needs an etching mask to which a circuit pattern has been transferred.
The etching mask varies in material and thickness depending on the resolution and the feature size required. For example, requirements for the 0.5-&mgr;m technology node were readily fulfilled by using a conventional resist and an exposure system with a mercury lamp emitting i-line (365 nm in wavelength) light. However, requirements for the 0.18-&mgr;m technology node are met only by using a resist of multi-layer structure (having an antireflection coating film at the bottom) and an exposure system with KrF laser (248 nm in wavelength) and phase-shift mask for ultrahigh resolution. The antireflection coating film may be an organic one (BARC: Bottom Anti-Reflective Coating) or inorganic one (BARL: Bottom Anti-Reflective Layer). FIG.
2
(
a
) is a sectional view of a sample which was taken just after exposure. This sample has an etching mask consisting of resist (
201
) and BARC (
202
) and a multi-layer film consisting of poly-Si (
203
) and SiO
2
(
204
) on a silicon substrate (
205
). FIG.
2
(
b
) is also a sectional view of a sample which was taken just after exposure. This sample has an etching mask consisting of resist (
201
) and BARL (
207
) and a multi-layer film consisting of poly-Si (
203
) and SiO
2
(
204
).
The BARC film (
202
) is formed by spin coating in the same way as resist film is formed. It flattens over the step (
209
) that occurs as the result of shallow trench isolation (
206
). This flat film is suitable for high-resolution exposure with a small depth of focus. This advantage, however, is offset by the disadvantage involving difficulties in controlling dimensions at the time of etching the BARC film (
202
) because the amount of overetching differs between the thin part (
210
) and the thick part (
211
). On the other hand, the BARL film (
207
) is composed of such elements as Si, O, and N, and it is formed by CVD such that the resulting film has a uniform thickness along the step on the underlayer. In dry etching, this film gives a uniform amount of overetching and permits easy dimensional control for BARL etching. Unfortunately, from the standpoint of the exposure system, this film is detrimental to resolution on account of the limited depth of focus.
A common procedure to form the mask is as follows. First, the BARC film (
202
) and the resist film (
201
) are sequentially formed or the BARL film (
207
) and the resist film (
201
) are sequentially formed. Then, after exposure, the BARC film (
202
) or the BARL film (
207
) is patterned by dry etching.
There is another type of mask (hard mask) to be used for gate electrode etching. This mask is free of organic matter so that it improves the dimensional accuracy at the time of gate forming and it permits the wide selection of gate insulating film. The hard mask is an SiO
2
film or SiN film made from TEOS(Tetra-Ethyl-Ortho-Silicate), HLD (High temperature Low pressure Decomposition), etc. FIG.
2
(
c
) is a sectional view of a sample with a hard mask which was taken just after exposure. The hard mask is usually formed in the following way. The TEOS film (
208
), the BARC film (
202
), and the resist film (
201
) are sequentially formed. After exposure, the BARC film (
202
) and the TEOS film (
208
) are patterned by dry etching. Finally, the resist film (
201
) and the BARC film (
202
) are removed by ashing. The dry etching and ashing in this procedure are accomplished by using special equipment.
The dry etching used for mask forming and gate etching is usually accomplished by an ion-assisted reaction which involves ions (which occur in plasma generated from a reactant gas in a vacuum chamber) and neutral radicals. A common way to generate plasma is to irradiate the reactant gas (introduced into a vacuum chamber for etching) with electromagnetic waves for dissociation. Typical plasma sources include capacitive coupled plasma (CCP), inductive coupled plasma (ICP), and electron resonance plasma (ECR). CCP and ICP employ electromagnetic waves of 13.56 MHz or 27 MHz, and ECR employs microwaves of 2.45 GHz or UHF of 450 MHz.
The dry etching apparatus with a plasma source is operated by controlling the following parameters so that the etched film has desired dimensions: the species of etchant gas, the processing pressure, and the electromagnetic power, which determine the characteristics of plasma; the sample temperature which determines the characteristics of chemical reactions; and the power of RF bias to draw ions to the sample. The object of etching one kind of film for mask forming and another kind of film for gate etching is achieved by selecting an etchant gas and an apparatus suitable for respective etching reactions. For example, the etching of BARC film for mask forming is carried out by using an etching apparatus with CCP plasma source in which O
2
is mixed with CF
4
or N
2
and plasma is generated from a gas diluted with Ar. Also, the etching of BARL or SiO
2
is carried out by using an etching apparatus with CCP plasma source in which plasma is generated from a fluorocarbon gas (such as C
4
F
8
and C
5
F
8
) diluted with O
2
and CO diluted with Ar. The etching of the gate electrode is carried out by using an etching apparatus with ICP or ECR plasma source. The etching of W layer or WSi layer employs CF
4
or SF
6
incorporated with Cl
2
, N
2
, and O
2
. The etching of poly-Si layer employs plasma generated from Cl
2
, HBr, or NF
3
incorporated with O
2
or He.
Ashing to remove the resist and halogen remaining after etching employs plasma generated from O
2
by ICP or microwave or employs O
3
generated under normal pressure. (In the former case, reactions are controlled by the sample temperature.) There may be an instance where reactions with the resist are accelerated by incorporating O
2
with a fluorocarbon gas such as CF
4
and CHF
3
.
The cleaning step to remove foreign matter and contaminants resulting from etching is accomplished mainly by wet cleaning with a solution, such as aqueous solutions of NH
4
OH/H
2
O
2
, HCl/H
2
O
2
, and hydrofluoric acid. The mixing ratio, treating time, and solution temperature may be adequately controlled according to the kind of contaminant.
After the gate electrode has been formed, the source and drain are formed in the following manner, reference being made to FIGS.
3
(
a
) and
3
(
b
) which exemplify the case of using a hard mask. First, as shown in FIG.
3
(
a
), a lightly doped extension (
304
) is formed by ion implantation which employs the gate electrode as a mask. Second, as shown in FIG.
3
(
b
), a sidewall space

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