Method of manufacturing non-volatile semiconductor devices

Details Method of manufacturing non-volatile semiconductor devices Method of manufacturing non-volatile semiconductor devices

2011-08-23

2011-08-23

Lee, Cheung (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S264000, C438S283000, C438S689000, C257SE21180, C257SE21210, C257SE21679

Reexamination Certificate

active

08003469

ABSTRACT:
A non-volatile semiconductor device includes a memory cell in a first area of a substrate, a low voltage transistor in a second area of the substrate, and a high voltage transistor in a third area of the substrate. The memory cell includes a tunnel insulation layer formed on the substrate, a charge trapping layer pattern formed on the tunnel insulation layer in the first area of the substrate, a blocking layer pattern formed on the charge trapping layer pattern and a control gate formed on the blocking layer pattern. The control gate has a width substantially smaller than a width of the blocking layer pattern and the width of the control gate is substantially smaller than a width of the charge trapping layer pattern. In addition, an offset is formed between the control gate and the blocking layer pattern such that a spacer is not formed on a sidewall of the control gate.

REFERENCES:
patent: 2006/0208338 (2006-09-01), Lee et al.
patent: 2008/0070368 (2008-03-01), Kim et al.
patent: 2010/0025752 (2010-02-01), Dong
patent: 08-078547 (1996-03-01), None
patent: 10-0770700 (2007-10-01), None

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