Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-03-10
2008-03-11
Kebede, Brook (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S295000, C257SE21680
Reexamination Certificate
active
07341913
ABSTRACT:
The invention is directed to a method for manufacturing a non-volatile memory. The method comprises steps of forming a mask layer on a substrate. An isolation structure is formed in the mask layer and the substrate, wherein the top surface of the isolation structure is lower than that of the mask layer and the isolation structure and the mask layer together form a recession. A spacer is formed at the sidewall of the recession and the recession is filled with an insulating layer. The mask layer and the spacer are removed and a tunneling dielectric layer is formed over the substrate. A first conductive layer is formed to fill the first opening and the isolating layer is removed to form a second opening. A gate dielectric layer and a second conductive layer are formed over the substrate sequentially. The second conductive layer and the first conductive layer are patterned.
REFERENCES:
patent: 2004/0115882 (2004-06-01), Hung et al.
patent: 2005/0139900 (2005-06-01), Jung et al.
Jianq Chyun IP Office
Kebede Brook
Lee Jae
Powerchip Semiconductor Corp.
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