Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-07-17
2009-11-24
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S199000, C438S197000, C257SE21170, C257SE21230, C257SE21540, C257SE21115, C257SE21218, C257SE21229, C257SE21245, C257SE21248, C257SE21632
Reexamination Certificate
active
07622344
ABSTRACT:
A method for manufacturing CMOS transistors includes an etching back process alternatively performed after the gate structure formation, the lightly doped drain formation, source/drain implantation, or SEG process to etch a hard mask layer covering and protecting a first type gate structure, and to reduce thickness deviation between the hard masks covering the first type gate structure and a second type gate structure. Therefore the damage to spacers, STIs, and the profile of the gate structures due to the thickness deviation is prevented.
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Cheng Tzyy-Ming
Hsu Shih-Chieh
Huang Cheng-Tung
Hung Wen-Han
Jeng Li-Shian
Hsu Winston
Nhu David
United Microelectronics Corp.
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