Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-09-09
2008-10-28
Smith, Bradley K (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S270000, C257SE21540
Reexamination Certificate
active
07442609
ABSTRACT:
A method of manufacturing a transistor. In one embodiment, the method includes forming a gate electrode by defining a gate groove in the substrate. A plate-like portion is defined in each of the trenches at a position adjacent to the groove so that the two plate-like portions will be connected with the groove and the groove is disposed between two plate-like portions. In one embodiment, the two plate-like portions are defined by an etching process which selectively etches the isolating material of the isolation trenches with respect to the semiconductor substrate material. A gate insulating material is provided at an interface between the active area and the groove and the interface between the active area and the plate-like portions, and a gate electrode material is deposited so as to fill the groove and the two plate-like portions.
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patent: 102004031385 (2006-01-01), None
Deok-Hyung Lee et al., “Fin-channel-array transistor (FCAT) featuring sub-70-nm low power and high performance DRAM” IEDM Tech. Dig., pp. 407 to 410, 2003 (Abstract Only).
Luyken Richard Johannes
Nuetzel Joachim
Schloesser Till
Strasser Marc
Wang Peng-Fei
Dicke Billig & Czaja, PLLC
Infineon - Technologies AG
Smith Bradley K
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