Method of manufacturing a semiconductor memory device having a c

Details Method of manufacturing a semiconductor memory device having a c Method of manufacturing a semiconductor memory device having a c

1996-03-14

1997-04-15

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438396, 438637, 438620, H01L 2170, H01L 2700

Patent

active

056209177

ABSTRACT:
In a semiconductor memory device having a novel structure of a wiring layer and a large capacitance capacitor and the manufacturing method therefor, on the transistor formed on the semiconductor substrate, a first conductive layer is formed extending along with the gate electrode of the transistor and connecting with the gate electrode, a storage electrode of a capacitor is formed on the first conductive layer by interposing the insulation film between the first conductive layer and the source region of the transistor, and a second conductive layer is formed in connection with the first conductive layer at a portion between memory cell array and the peripheral circuit region. Storage electrodes can be made thicker without affecting to the step-difference between memory cells and the peripheral circuit region, so that a more reliable semiconductor memory device with a capacitor having a larger capacitance can be realized.

REFERENCES:
patent: 5135889 (1992-08-01), Allen
patent: 5284787 (1994-02-01), Ahn
patent: 5386382 (1995-02-01), Ahn
patent: 5481127 (1996-01-01), Ogawa

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