Method of manufacturing a semiconductor memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S396000, C438S763000, C257S303000, C257SE21008, C257SE21648, C257SE21651

Reexamination Certificate

active

07402488

ABSTRACT:
A method of manufacturing a semiconductor memory device includes forming a carbon-containing layer on a semiconductor substrate, forming an insulating layer pattern on the carbon-containing layer, the insulating layer pattern partially exposing an upper surface of the carbon-containing layer, dry-etching the exposed portion of the carbon-containing layer, to form a carbon-containing layer pattern for defining a storage node hole, forming a bottom electrode inside the storage node hole, forming a dielectric layer on the bottom electrode inside the storage node hole, the dielectric layer covering the bottom electrode, and forming an upper electrode on the dielectric layer inside the storage node hole, the upper electrode covering the dielectric layer.

REFERENCES:
patent: 6444538 (2002-09-01), Kwon et al.
patent: 6448597 (2002-09-01), Kasai et al.
patent: 6462371 (2002-10-01), Weimer et al.
patent: 6465351 (2002-10-01), Jeong
patent: 6653186 (2003-11-01), Won et al.
patent: 6982200 (2006-01-01), Noguchi et al.

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