Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

1998-01-15

1999-06-15

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438268, 438275, H01L 218238

Patent

active

059131144

ABSTRACT:
A semiconductor device, and a method of manufacturing the same, containing a high voltage DMOS transistor, a low voltage CMOS transistor, and a bipolar transistor in a single substrate. The steps include forming an isolation layer within the substrate in an isolation region between each of a DMOS region, a CMOS region, or a bipolar region. A first oxide layer of variable thickness is formed on the substrate, a thick second oxide layer is formed on the isolation layer, and a polysilicon layer is formed on both oxide layers. The polysilicon layer is patterned to form gate patterns on the first oxide layer and resistive patterns on the second oxide layer. The gate pattern is then doped but the resistive pattern is undoped. The thickness of the first oxide layer in the DMOS region is greater than the thickness of the first oxide layer in the CMOS region.

REFERENCES:
patent: 4806500 (1989-02-01), Scheibe
patent: 5340756 (1994-08-01), Nagayasu
patent: 5441903 (1995-08-01), Eklund
patent: 5541125 (1996-07-01), Williams et al.
patent: 5851864 (1998-12-01), Ito et al.

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