Method of manufacturing a raised source/drain MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438486, 438664, 148DIG19, H01L 2128

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active

058245863

ABSTRACT:
A method of manufacturing a raised source/drain MOSFET by depositing amorphous silicon on the partially formed MOSFET having the gate and gate oxide spacers formed, ion implanting to form the appropriate source/drain junctions, annealing wherein epitaxial growth takes place in regions where the amorphous silicon is over silicon, and etching the remaining amorphous silicon. A layer of refractory metal is deposited and a second anneal converts the refractory metal overlaying silicon to silicide.

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patent: 5314832 (1994-05-01), Deleonibus
patent: 5496750 (1996-03-01), Moslehi
patent: 5637518 (1997-06-01), Prall et al.
S Wolf, "Silicon Processing for the VLSI Era" vol. II, pp. 144-149, Jun. 1990.

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