Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2011-05-24
2011-05-24
Dang, Phuc T (Department: 2892)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S151000, C438S257000, C257S314000, C257S317000
Reexamination Certificate
active
07947590
ABSTRACT:
The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. The non-volatile memory device may further include at least one control gate electrode that may cover at least a portion of outer surfaces of the pair of fins, may extend over the bridge insulating layer, and may be isolated from the semiconductor substrate. At least one pair of gate insulating layers may be between the at least one control gate electrode and the pair of fins, and at least one pair of storage nodes may be between the at least one pair of gate insulating layers and the at least one control gate electrode.
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Hyun Jae-Woong
Kim Suk-pil
Kim Won-joo
Koo June-mo
Lee Jung-Hoon
Dang Phuc T
Harness & Dickey & Pierce P.L.C.
Samsung Electronics Co,. Ltd.
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