Method of manufacturing a flash memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C257S314000, C257S315000, C257SE21682

Reexamination Certificate

active

07452773

ABSTRACT:
In a method of manufacturing a flash memory device, an insulation layer pattern is formed on a substrate having cell and peripheral regions. Trenches formed in the substrate are converted into trench structures. A tunnel oxide layer is formed on the substrate. A space between the trench structures is filled with a first conductive layer. The trench structures are removed to form trench isolation structures and to convert the first conductive layer into a first conductive layer pattern. A dielectric layer is formed on the first conductive layer patterns and the trench isolation structures. An insulation layer is formed on the substrate in the peripheral region. A third conductive layer is formed on the second conductive layer, the insulation layer and the trench isolation layers. First and second gate structures are formed in the cell region and the peripheral region, respectively.

REFERENCES:
patent: 6023085 (2000-02-01), Fang
patent: 2004/0145007 (2004-07-01), Sumino et al.
patent: 2005/0029573 (2005-02-01), Sato et al.
patent: 10-074914 (1998-03-01), None
patent: 10-0268894 (2000-07-01), None
patent: 10-0466190 (2005-01-01), None

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