Method of making vertical transistor structures having...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C257S329000, C257S401000, C257SE29262, C257SE21410, C438S156000

Reexamination Certificate

active

07488651

ABSTRACT:
The present inventions include a vertical transistor formed by defining a channel length of the vertical-surrounding-gate field effect transistor with self-aligning features. The method provides process steps to define the transistor channel length and recess silicon pillars used to form the vertical-surrounding gate field effect transistor structure for use in the manufacture of semiconductor devices.

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patent: 2008/0124869 (2008-05-01), Yoon et al.

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