Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2007-05-08
2007-05-08
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S006000, C438S098000, C438S128000, C438S411000, C438S453000, C438S523000, C438S533000, C438S598000, C257S276000, C257S522000
Reexamination Certificate
active
10105431
ABSTRACT:
A method and apparatus are provided an interconnect cladding layer. In one embodiment, a first sacrificial layer is deposited over a substrate and patterned. In the vias created during the patterning operation, a conductive material is placed to create conductive interconnects. After planarizing the conductive material, the sacrificial layer is removed leaving the interconnect exposed. A cladding layer is then deposited over the conductive material.
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Kloster Grant
Leu Jihperng
Morrow Patrick
Ott Andrew
Wong Lawrence D.
Intel Corporation
Jr. Carl Whitehead
Kenyon & Kenyon LLP
Mitchell James M.
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