Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-06-07
2000-09-12
Thomas, Tom
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438243, 257302, H01L 218242
Patent
active
061177261
ABSTRACT:
A method of making a trench capacitor including the following steps: forming a first trench of predetermined depth into a semiconductor substrate; forming an electrode plate on the side-wall of a bottom of the first trench; forming a dielectric layer on the electrode plate; forming a first conductive portion on the dielectric layer, wherein the first conductive portion fills the bottom of the first trench to form a second trench; forming an insulation layer to fill the bottom portion of the second trench to make a third trench in the second trench; forming a conductive spacer along the side-wall of the third trench; etching the insulation layer using the conductive spacer as a mask to form a forth trench; and then filling the forth trench with a conductive material.
REFERENCES:
patent: 5395786 (1995-03-01), Hsu et al.
patent: 5658816 (1997-08-01), Rajeevakumar
Abstract for L. Nesbit, et al., "A 0.6 .mu.m.sup.2 265Mb Trench DRAM Cell With Self-Aligned BuriEd STrap (BEST)", 1993 IEDM, pp. 627-630.
Lee Pei-Ing Paul
Tsai Hsin-Chuan
Marcou George T.
Nan Ya Technology Corporation
Parekh Nitin
Thomas Tom
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