Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1998-11-18
2001-10-09
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S302000, C438S305000, C438S306000, C438S525000
Reexamination Certificate
active
06300205
ABSTRACT:
FIELD OF THE INVENTION
The present invention is directed to semiconductor devices and method of making these devices. In particular, the present invention is directed to semiconductor devices having a halo region below a lightly-doped drain region and adjacent to an active region and methods of making these devices.
BACKGROUND OF THE INVENTION
Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor. The MOS transistor is used as one of the basic building blocks of most modern electronic circuits. Thus, such circuits realize improved performance and lower costs as the performance of the MOS transistor is increased and as the manufacturing costs are reduced.
A typical MOS semiconductor device generally includes a semiconductor substrate on which a gate electrode is disposed. The gate electrode, which acts as a conductor, receives an input signal to control operation of the device. Source and drain regions are typically formed in regions of the substrate adjacent to the gate electrodes by heavily doping the regions with a dopant material of a desired conductivity. The conductivity of the doped region depends on the type and concentration of the impurity used to dope the region. The typical MOS transistor is symmetrical, which means that the source and drain are interchangeable. Whether a region acts as a source or drain typically depends on the respective applied voltages and the type of device being made. The collective term source/drain region is used herein to generally describe an active region used for the formation of either a source or drain.
A channel region is formed in the semiconductor substrate beneath the gate electrode and between the source and drain regions. The channel is typically lightly-doped with a dopant material. The gate electrode is generally separated from the substrate by an insulating layer, typically an oxide layer such as SiO
2
. The insulating layer is provided to prevent current from flowing between the gate electrode and the source, drain or channel regions. In operation, a voltage is typically developed between transverse electric field is set up in the channel region. By varying the transverse electric field, it is possible to modulate the conductance of the channel region between the source and drain regions. In this manner, an electric field is used to control the current flow through the channel region. This type of device is commonly referred to as a MOS field-effect-transistor (MOSFET).
MOS devices typically fall in one of two groups depending on the type of dopant materials used to form the source, drain and channel regions. The two groups are often referred to as n-channel and p-channel devices. The type of channel is identified based on the conductivity type of the channel which is developed under the transverse electric field. In an n-channel MOS (NMOS) device, for example, the conductivity of the channel under a transverse electric field is of the conductivity type associated with n-type impurities (e.g., arsenic or phosphorous). Conversely, the channel of a p-channel MOS (PMOS) device under the transverse electric field is associated with p-type impurities (e.g., boron).
A number of different techniques and fabrication processes may be used to form MOS devices. With reference to
FIGS. 1A-1E
, one typical MOS fabrication process is depicted to form semiconductor structures with source/drain structures having heavily-doped regions and adjacent lightly-doped regions commonly referred to as lightly-doped drain (LDD) regions. LDD structures are often used in the formation of semiconductor devices having short channels to prevent or reduce short-channel effects.
As depicted in
FIG. 1A
, a gate electrode
103
is formed on a substrate
101
. An LDD region
115
is formed in the substrate
101
by implanting a relatively low dose of a dopant material
110
into the exposed areas, as illustrated in FIG.
1
B. Following the LDD implant, a spacer layer
116
is formed and etched to form spacers
117
on sidewalls of the gate electrode
103
, as illustrated in
FIGS. 1C and 1D
. The substrate
101
is again implanted with a heavy dose of dopant material
120
aligned with the spacers
117
to form heavily-doped regions
118
, which together with the LDD regions
115
, form LDD source/drain structures
119
, as illustrated in FIG.
1
E. Following formation of the LDD structures
119
, further processing such as silicidation and interconnect formation is performed. A more detailed description of the elements and fabrication of source/drain structures may be found in S. Wolf,
Silicon Processing for the VLSI Era,
Vol. 2: Processing Integration, pp. 354-363.
As semiconductor devices become smaller, the channel length becomes shorter. One problem of short channel junctions is punchthrough of carriers across the channel region from one heavily-doped region to the other in the absence of a gate current. Punchthrough typically occurs due to the merging of source and drain depletion areas. A variety of punchthrough implant techniques have been developed to overcome this problem. These include providing a punchthrough implant in the channel region prior to formation of the gate electrode. An alternative method includes forming a halo region adjacent to the heavily-doped regions of the source/drain structures and below the LDD region using, for example, an angled implant of a dopant material having a different conductivity type than that of the heavily-doped regions and LDD regions. This halo region is typically formed after the heavily-doped and LDD regions. See, for example, S. Wolf,
Silicon Processing for the VLSI Era,
Vol. 3: The Submicron MOSFET, pp. 238-240, 309-311, and 621-22. As semiconductor devices become smaller, there is a need for methods that provide for greater precision in the alignment of structures in a device, including the heavily-doped, LDD, and halo regions, to ensure accurate and reproducible device structures.
SUMMARY OF THE INVENTION
Generally, the present invention relates to the formation of semiconductor devices having heavily-doped active, LDD, and halo regions, including, at least in some instances, the self-aligned formation of heavily-doped active, LDD, and halo regions. One method of making a semiconductor device includes forming a gate electrode on a substrate and forming a spacer on a sidewall of the gate electrode. An active region is then formed in the substrate and adjacent to the spacer, but spaced apart from the gate electrode, using a first dopant material. A halo region is formed in the substrate under the spacer and adjacent to the active region using a second dopant material of a conductivity type different than the first dopant material. The halo region may be formed by implanting the second dopant region into the substrate at an angle substantially less than 90° relative to a surface of the substrate. A portion of the spacer is then removed and a lightly-doped region is formed in the substrate adjacent to the active region and the gate electrode and shallower than the halo region using a third dopant material of a same conductivity type as the first dopant material.
A semiconductor device includes a substrate and a gate electrode disposed over the substrate. A lightly-doped region is provided in the substrate adjacent to the gate electrode and an active region is provided in the substrate adjacent to the lightly-doped region and spaced apart from the gate electrode. A halo region is provided in the substrate below the lightly-doped region and adjacent to the active region. The halo region is formed using a dopant material of a conductivity type different than the dopant material of the active region and includ
Buller James
Cheek Jon
Fulford H. Jim
Wristers Derick J.
Advanced Micro Devices , Inc.
Diaz José R
Lee Eddie
LandOfFree
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