Method of making a memory fault-tolerant using a variable size r

Details Method of making a memory fault-tolerant using a variable size r Method of making a memory fault-tolerant using a variable size r

1997-03-31

1998-11-03

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, 36523003, 36523006, G11C 700

Patent

active

058319131

ABSTRACT:
A method of making a memory fault-tolerant through the use of a variable size redundancy replacement (VSRR) circuit arrangement. A redundancy array supporting the primary arrays forming the memory includes a plurality of variable size redundancy units, each of which encompassing a plurality of redundant elements. The redundant units used for repairing faults in the memory are independently controlled. All the redundancy elements within a repair unit are preferably replaced simultaneously. The redundancy elements in the redundancy unit are controlled by decoding address lines. The variable size that characterizes this configuration makes it possible to choose the most effective redundancy unit, and in particular, the one most closely fitting the size of the cluster of failures to be replaced. This method significantly reduces the overhead created by added redundancy elements and control circuitry, while improving the access speed and reducing power consumption. Finally, a fault-tolerant block redundancy controlled by a priority decoder makes it possible to use VSRR units for repairing faults in the block redundancy prior to its use for replacing a defective block within the memory.

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