4. Static information storage and retrieval
  5. Read/write circuit
  6. Bad bit

H. Daniel Schurmann

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Circuit for allowing a two-pass fuse blow to memory chips combin

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Method of making a memory fault-tolerant using a variable size r

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Timing analysis method for PLLS

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Patent

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