Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-09-13
2005-09-13
Chen, Jack (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S399000, C438S239000
Reexamination Certificate
active
06943081
ABSTRACT:
Methods of forming an electronic structure can include forming an interlayer insulating layer on a substrate, and forming a storage node comprising a base and sidewalls extending away from the base. The interlayer insulating layer can have a contact hole therein exposing a portion of the substrate. Moreover, the storage node base can be in the contact hole and the sidewalls can extend away from the base and away from the substrate with portions of the sidewalls being within the contact hole and with portions of the sidewalls extending outside the contact hole beyond the interlayer insulating layer away from the substrate. Related structures are also discussed.
REFERENCES:
patent: 2002/0024085 (2002-02-01), Nakamura et al.
patent: 2001-244429 (2001-09-01), None
patent: 1020020001999 (2002-01-01), None
patent: 2003-0001917 (2003-01-01), None
patent: 10-2003-0001917 (2003-01-01), None
Notice to Submit Response, Korean Application No. 10-2002-0029494, Jan. 21, 2005.
English Translation of Korean Office Action for Application No. 10/2002-0029494 dated May 28, 2004.
Hwang In-Seak
Lee Won-Jun
Shin Ji-Chul
Chen Jack
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
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