Method of forming semiconductor device includeing forming...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S275000

Reexamination Certificate

active

07608500

ABSTRACT:
Provided is a method of forming a semiconductor device. A tunnel insulating layer is formed on a substrate having a cell region and a low voltage region. First and second charge storage gate patterns (e.g., floating gate patterns) are formed on the tunnel insulating layers of the cell and low voltage region, respectively. A blocking insulating layer and a control gate conductive layer are formed on the substrate in sequence. The control gate conductive layer, the blocking insulating layer, the second floating gate pattern and the tunnel insulating layer of the low voltage region are removed to expose the substrate of the low voltage region. The low-voltage gate insulating layer is formed on the exposed substrate. A low-voltage gate conductive pattern is formed on the low-voltage gate insulating layer.

REFERENCES:
patent: 6281050 (2001-08-01), Sakagami
patent: 2007/0241386 (2007-10-01), Wang et al.
patent: 2000-269466 (2000-09-01), None
patent: 2005-159361 (2005-06-01), None
patent: 10-2001-0027375 (2001-04-01), None
patent: 2002-0056355 (2002-07-01), None
patent: 2003-0092997 (2003-12-01), None
patent: 10-2004-0005477 (2004-01-01), None
English language abstract of Korean Publication No. 2002-0056355.
English language abstract of Korean Publication No. 2003-0092997.
English language abstract of Japanese Publication No. 2000-269466.

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