Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1998-10-23
2000-12-26
Nelms, David
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438592, H01L 214763
Patent
active
061658812
ABSTRACT:
I A method is achieved for removing a hardmask from a feature on a semiconductor wafer. The method comprises the following phases: depositing a buffer layer overall; etching back the buffer layer in an etching apparatus to expose the hardmask; etching the hardmask in the etching apparatus; and etching of the remaining buffer layer in the etching apparatus.
REFERENCES:
patent: 4657628 (1987-04-01), Holloway et al.
patent: 5061647 (1991-10-01), Roth et al.
patent: 5372673 (1994-12-01), Stager et al.
patent: 5431770 (1995-07-01), Lee et al.
patent: 5837588 (1998-11-01), Wu
patent: 5968336 (1999-10-01), Rolferson
patent: 5985761 (1999-11-01), Sparks et al.
Tao Hun-Jan
Tsai Chia-Shiung
Ackerman Stephen B.
Le Dung A
Nelms David
Saile George O.
Taiwan Semiconductor Manufacturing Company
LandOfFree
Method of forming salicide poly gate with thin gate oxide and ul does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming salicide poly gate with thin gate oxide and ul, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming salicide poly gate with thin gate oxide and ul will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-994321