Method of forming power semiconductor devices having insulated g

Details Method of forming power semiconductor devices having insulated g Method of forming power semiconductor devices having insulated g

1997-10-14

1999-10-19

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438273, 438297, 438301, 438563, H01L 21336

Patent

active

059703296

ABSTRACT:
Methods of forming power semiconductor devices include the steps of forming an insulated gate electrode on a face of semiconductor substrate containing a body region of first conductivity type (e.g., P-type) therein extending to the face. Using the gate electrode as a mask, a step is then performed to oxidize the body region and substrate at the face to form a first oxide layer. Source and drain region dopants are then implanted through the first oxide layer and into the body region and substrate to define recessed source and drain regions of second conductivity type therein, respectively. The step of implanting source and drain region dopants may be preceded by the step of etching the first oxide layer using an etching mask which covers the gate electrode. The step of oxidizing the body region and substrate may also be preceded by the step of forming nitride spacers on sidewalls of the gate electrode and then also using the nitride spacers as a mask during the oxidation step. These nitride spacers are then removed prior to performing the step of implanting the source and drain region dopants.

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patent: 5372960 (1994-12-01), Davies et al.
patent: 5637514 (1997-06-01), Jeng et al.
patent: 5798550 (1998-08-01), Kurouanagi et al.

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