Method of forming MIM capacitor electrodes

Details Method of forming MIM capacitor electrodes Method of forming MIM capacitor electrodes

2007-04-03

2007-04-03

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S396000, C438S386000, C257SE21008

Reexamination Certificate

active

10811657

ABSTRACT:
A novel method for forming electrodes in the fabrication of an MIM (metal-insulator-metal) capacitor, is disclosed. The method improves MIM capacitor performance by preventing plasma-induced damage to a dielectric layer during deposition of a top electrode on the dielectric layer, as well as by reducing or preventing the formation of an interfacial layer between the dielectric layer and the electrode or electrodes, in fabrication of the MIM capacitor. The method typically includes the patterning of crown-type capacitor openings in a substrate; depositing a bottom electrode in each of the crown openings; subjecting the bottom electrode to a rapid thermal processing (RTP) or furnace anneal step; depositing a dielectric layer on the annealed bottom electrode; depositing a top electrode on the dielectric layer using a plasma-free CVD (chemical vapor deposition) or ALD (atomic layer deposition) process; and patterning the top electrode of each MIM capacitor.

REFERENCES:
patent: 6596583 (2003-07-01), Agarwal et al.
patent: 6919273 (2005-07-01), Otsuki et al.
patent: 2002/0190294 (2002-12-01), Iizuka et al.
patent: 2003/0067023 (2003-04-01), Olewine et al.
patent: 2004/0046197 (2004-03-01), Basceri et al.

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