Method of forming low resistance and reliable via in...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S597000, C438S658000, C438S687000, C257SE21575

Reexamination Certificate

active

10965031

ABSTRACT:
A novel interlevel contact via structure having low contact resistance and improved reliability, and method of forming the contact via. The method comprises steps of: etching an opening through an interlevel dielectric layer to expose an underlying metal (Copper) layer surface; and, performing a low energy ion implant of an inert gas (Nitrogen) into the exposed metal underneath; and, depositing a refractory liner into the walls and bottom via structure which will have a lower contact resistance due to the presence of the proceeding inert gas implantation. Preferably, the inert Nitrogen gas reacts with the underlying exposed Copper metal to form a thin layer of CuN.

REFERENCES:
patent: 6156620 (2000-12-01), Puchner et al.
patent: 6429105 (2002-08-01), Kunikiyo
patent: 6703309 (2004-03-01), Chopra
patent: 2003/0045115 (2003-03-01), Fang
patent: 2003/0173671 (2003-09-01), Hironaga et al.
patent: 2004/0056361 (2004-03-01), McTeer

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