Method of forming an integrated circuit having both low voltage

Details Method of forming an integrated circuit having both low voltage Method of forming an integrated circuit having both low voltage

1998-10-22

1999-10-19

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438981, H01L 21336

Patent

active

059703458

ABSTRACT:
The invention comprises an integrated circuit having both low voltage and high voltage MOS transistors and a method for making the integrated circuit. In accordance with the method of making the integrated circuit, a first oxide layer is formed outwardly from a semiconductor substrate comprising a low voltage region and a high voltage region. A sacrificial layer is formed outwardly from the first oxide layer. The part of the sacrificial layer disposed outwardly from the low voltage region is removed to form an intermediate structure. The intermediate structure is selectively etched to remove the part of the first oxide layer disposed outwardly from the low voltage region. A second oxide layer is then formed comprising a first area disposed outwardly from the low voltage region and second area disposed outwardly from the high voltage region. The formation of the second oxide layer in the second area consumes the sacrificial layer.

REFERENCES:
patent: 4851370 (1989-07-01), Doklan et al.
patent: 5665620 (1997-09-01), Nguyen et al.
patent: 5716863 (1998-02-01), Arai

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