Method of forming a tungsten plug in a semiconductor device

Details Method of forming a tungsten plug in a semiconductor device Method of forming a tungsten plug in a semiconductor device

2001-01-05

2002-07-02

Whitehead, Jr., Carl (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S653000, C438S656000, C438S626000

Reexamination Certificate

active

06413853

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device. More particularly, the present invention relates to a method of forming a tungsten plug in a semiconductor device.
This is a counterpart of, and claims priority to, Korean patent application no, 2000-00495, filed Jan. 6, 2000.
2. Description of the Related Art
As the circuitry of semiconductor devices become more highly integrated, the area occupied by a semiconductor element and a wiring line of the devices become smaller and smaller. Currently, a three-dimensional semiconductor element arrangement and a multi-level wiring technique are widely used to produce a high degree of integration within a limited area. In this case, contact holes in various interlayers of the device are used to facilitate a large number of contacts between the semiconductor element and the wiring line or between discrete wiring lines. Given that the contact holes will have a certain depth dictated by the vertical dimension of the interlayer, contact holes having a greater aspect ratio are required. However, it is very difficult to form contact holes having a high aspect ratio. That is, it is very difficult to etch a thick interlayer insulating layer and form a deep and narrow contact hole. In addition, it is difficult to completely fill a deep and narrow contact hole with conductive material that is used to produce the contact.
More specifically, the electrical contact for connecting an electrode element and a wiring line in a semiconductor device is typically formed when metal is deposited on an interlayer insulating layer having a contact hole therein. For instance, when metal is deposited on an interlayer insulating layer to form the wiring line itself, the contact hole in the interlayer insulating layer is also filled with the metal thereby connecting the wiring line, as it is formed, to the electrode element. Aluminum is widely used for the wiring line due to its excellent electrical characteristics. Furthermore, because aluminum has a low melting point, the aluminum once deposited is subjected to a reflow process so that it will completely fill the narrow and deep contact hole without giving rise to a so-called over-hang phenomenon or without any void being left in the contact. Even more specifically, first, aluminum is sputtered into the contact hole and then heat is applied to reflow the aluminum, whereby the contact hole is completely filled with the aluminum. In general, more aluminum is sputtered after the reflow process has been performed. However, when deposited aluminum is directly in contact with an underlying silicon substrate (e.g., a source/drain) exposed by the contact hole, silicon diffuses into the aluminum due to its high solubility, even at a low temperature. Hence, the aluminum spikes into the silicon, leading to source/drain junction leakage. In order to prevent such an aluminum spiking phenomenon from occurring, a barrier metal layer is formed on the silicon before the aluminum is deposited.
It has also been known to use an Si-Al alloy as the target material in sputtering for reducing the silicon diffusion that otherwise occurs when pure aluminum is sputtered into a contact hole exposing a silicon layer. Because Si-Al exhibits a stable solid state, no further diffusion of silicon from the substrate into the aluminum occurs after Si-Al alloy is sputtered onto the silicon substrate, thereby preventing the aluminum spiking phenomenon from occurring.
Nonetheless, the higher the integration density of the integrated circuit and the greater the aspect ratio of the contact hole become, the sputtering process obviously becomes more and more problematic. Accordingly, the process of sputtering aluminum to form a contact in a contact hole is being reduced in favor of a CVD (chemical vapor deposition) process of forming a tungsten plug in the contact hole. Tungsten deposited by CVD has excellent filling characteristics. The CVD of tungsten uses WF
6
, SiH
4
or H
2
as a source gas and the basic chemistry thereof is as follows.
[Equation 1]
2WF
0
+3SiH
4
=2W+6H
2
+3SiF
4
[Equation 2]
WF
6
+SiH
4
=W+2HF+H
2
+SiF
4
[Equation 3]
WF
6
+3H
2
=W+6HF
Many different methods of CVD, i.e. methods carried out under various process conditions, have been suggested as being capable of efficiently forming CVD tungsten having an excellent contact hole filling characteristic. Nonetheless, like the case of using aluminum to form an electrical contact in a contact hole, the use of CVD tungsten also requires the forming of a barrier metal layer to prevent silicon from diffusing into the metal contact. In this case, titanium and titanium nitride layers are sequentially formed over the silicon layer (source/drain region). The titanium layer serves as a so-called ohmic contact to provide a good contact resistance. The titanium nitride layer serves as a main barrier layer. The titanium nitride layer also prevents WF
6
from diffusing into and hence, reacting with the titanium layer. The basic chemistry associated with the reaction of WF
6
and titanium is as follows.
[Equation 4]
2WF
6
+3Ti=2W+3TiF
4
.
If there is any defect in the titanium nitride layer, or if the titanium nitride layer is not properly stuffed with oxygen, then WF
6
can penetrate through weak spots of the titanium nitride layer and react with the underlying titanium.
FIGS. 1 and 2
show the problems associated with an imperfect titanium nitride layer when a CVD tungsten plug is used as a contact. Sputtered titanium nitride layer
400
undergoes high stress. The stress is most concentrated at a corner of the silicon layer
200
defining the opening of the contact hole. Because of the columnar growth of titanium nitride layer
400
, the material at the corner is also more porous and thus more vulnerable to WF
6
penetration. Once started, the reaction between the titanium layer
300
and the WF
6
proceeds rapidly. As a result, the titanium nitride layer
400
peels off of the silicon layer
200
as shown in FIG.
1
. Meanwhile, tungsten nucleates on both sides of the peeling titanium nitride layer
400
and grows into thick tungsten films, forming a rather pronounced hump or conical protrusion
510
as shown in FIG.
2
. Therefore, the etchback RIE process cannot remove the hump or conical protrusion
510
completely resulting in intra-and inter-level metal shorts.
Attempts to prevent such a hump or protrusion from being produced can be made. For instance, the corner of the silicon layer
200
, defining the opening of the contact hole, can be provided with curvature to reduce the stress concentration on the titanium nitride layer
400
. Also, the sputtering processing conditions and annealing process under which the titanium nitride layer
400
is formed can be carefully controlled to limit the porosity and maximize the density of the titanium nitride. However, providing the corner of the silicon layer
200
with curvature at the opening of the contact hole compromises the degree to which the device can be made more densely integrated. In addition, it is difficult to precisely control the forming (composition) and annealing of the titanium nitride. Accordingly, it is difficult to completely prevent the titanium nitride layer
400
from peeling off of the silicon layer
200
and hence, it is difficult to keep the hump or protrusion
510
from forming.
Many methods have in fact been suggested as being capable of preventing the so-called volcano phenomena, shown in
FIG. 2
, from occurring. U.S. Pat. No. 5,552,339 discloses a method in which an amorphous silicon layer is formed on an adhesive layer. U.S. Pat. No. 5,874,355 claims to produce a highly dense titanium nitride layer by introducing nitride plasma during the annealing process. U.S. Pat. No. 5,672,543 discloses the use of a buffer layer for reducing the stress on the titanium nitride layer. However, all of these methods require

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