Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-08-01
2006-08-01
Kang, Donghee (Department: 2811)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000, C438S263000, C438S264000, C438S265000, C257S316000, C257S324000, C257S371000, C257S548000
Reexamination Certificate
active
07084030
ABSTRACT:
A non-volatile memory device includes a cell region having a memory gate pattern with a charge storage layer, and a peripheral region having a high-voltage-type gate pattern, a low-voltage-type gate pattern, and a resistor pattern. To fabricate the above memory device, a device isolation layer is formed in a substrate. Gate insulating layers having difference thickness are formed in low-and high-voltage regions of the peripheral region, respectively. A first conductive layer is formed over substantially the entire surface of a gate insulating layer in the peripheral region. A triple layer including a tunneling insulating layer, a charge storage layer, and a blocking insulating layer and a second conductive layer are sequentially formed over substantially the entire surface of the substrate including the first conductive layer.
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Choi Jung-Dal
Lee Chang-Hyun
Shin Wang-Chul
Kang Donghee
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
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