Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2007-03-23
2010-06-08
Richards, N Drew (Department: 2895)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S671000, C438S551000, C438S552000, C438S700000, C438S702000, C438S723000, C438S725000, C438S736000, C257SE21026, C257SE21027
Reexamination Certificate
active
07732341
ABSTRACT:
A method of forming hard mask employs a double patterning technique. A first hard mask layer is formed on a substrate, and a first sacrificial pattern is formed on the first hard mask layer by photolithography. Features of the first sacrificial pattern are spaced from one another by a first pitch. A second hard mask layer is then formed conformally on the first sacrificial pattern and the first hard mask layer so as to delimit recesses between adjacent features of the first sacrificial pattern. Upper portions of the second hard mask layer are removed to expose the first sacrificial pattern, and the exposed first sacrificial pattern and the second sacrificial pattern are removed. The second hard mask layer and the first hard mask layer are then etched to form a hard mask composed of residual portions of the first hard mask layer and the second hard mask layer. A fine pattern of a semiconductor device, such as a trench isolation region or a pattern of contact holes, can be formed using the hard mask as an etch mask.
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Cho Han-ku
Koh Cha-won
Lee Ji-young
Nam Jeong-lim
Park Joon-soo
Lee Jae
Richards N Drew
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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