Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-01-17
2006-01-17
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S242000, C438S243000, C438S386000
Reexamination Certificate
active
06987042
ABSTRACT:
A method of forming collar isolation for a trench storage memory cell structure is provided in which amorphous Si (a:Si) and silicon germanium (SiGe) are first formed into a trench structure. An etching process that is selective to a:Si as compared to SiGe is employed in defining the regions in which the collar isolation will be formed. The selective etching process employed in the present invention is a wet etch process that includes etching with HF, rinsing, etching with NH4OH, rinsing, and drying with a monohydric alcohol such as isopropanol. The sequence of NH4OH etching and rinsing may be repeated any number of times. The conditions used in the selective etching process of the present invention are capable of etching a:Si at a faster rate than SiGe.
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Beintner Jochen
Moumen Naim
Wrschka Porshia S.
C. Li Todd M.
Scully Scott Murphy & Presser
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