Method of fine patterning semiconductor device

Etching a substrate: processes – Masking of a substrate using material resistant to an etchant – Mask is multilayer resist

Reexamination Certificate

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C216S041000, C216S046000, C438S689000

Reexamination Certificate

active

07998357

ABSTRACT:
For integrated circuit fabrication, at least one spacer support structure is formed in a first area over a semiconductor substrate, and a mask material is deposited on exposed surfaces of the spacer support structure and on a second area over the semiconductor substrate. A masking structure is formed on a portion of the mask material in the second area, and the mask material is patterned to form spacers on sidewalls of the spacer support structure and to form a mask pattern under the masking structure. The spacer support structure and the masking structure are comprised of respective high carbon content materials that have been spin-coated and have substantially a same etch selectivity.

REFERENCES:
patent: 6475891 (2002-11-01), Moon
patent: 7115525 (2006-10-01), Abatchev et al.
patent: 7253118 (2007-08-01), Tran et al.
patent: 2006/0046484 (2006-03-01), Abatchev et al.

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