Method of fabricating vertical channel transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21410

Reexamination Certificate

active

08053316

ABSTRACT:
A method of fabricating a vertical channel transistor includes: forming a line type active pattern on a substrate so as to extend in a first horizontal direction; forming a vertical channel isolating the active pattern in a second horizontal direction intersecting the first horizontal direction and extending vertically on the substrate; forming a buried bit line extending in the first horizontal direction on the substrate; and forming a word line extending in the second horizontal direction along at least one side surface of the vertical channel.

REFERENCES:
patent: 7531412 (2009-05-01), Yoon et al.
patent: 2006/0097304 (2006-05-01), Yoon et al.
patent: 2006/0113587 (2006-06-01), Thies et al.
patent: 2008/0296671 (2008-12-01), Takaishi
patent: 2009/0189217 (2009-07-01), Yoon et al.
patent: 2009-10366 (2009-01-01), None
patent: 10-0618875 (2006-08-01), None
patent: 10-2009-0026658 (2009-03-01), None

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