Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-06-30
2010-11-02
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S275000, C438S279000, C438S299000, C257SE21632
Reexamination Certificate
active
07824975
ABSTRACT:
A method of fabricating a semiconductor device having a gate spacer layer with a uniform thickness wherein a gate electrode layer pattern is formed on a substrate and ion implantation processes of respectively different doses are formed on side walls of the gate electrode layer patterns in respective first and second regions of the substrate. A first gate spacer layer is formed on the gate electrode layer pattern where the ion implantation process is performed. A second gate spacer layer is formed on the first gate spacer layer.
REFERENCES:
patent: 6673705 (2004-01-01), Miyashita
patent: 6794256 (2004-09-01), Fuselier et al.
patent: 6815320 (2004-11-01), Kim et al.
patent: 7064071 (2006-06-01), Schwan
patent: 7282426 (2007-10-01), Mathew et al.
patent: 2003/0059983 (2003-03-01), Ota et al.
patent: 2006/0194381 (2006-08-01), Wei et al.
patent: 2006/0281273 (2006-12-01), Watanabe et al.
Joung Yong Soo
Rouh Kyoung Bong
Seo Hye Jin
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Trinh Michael
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