Method of fabricating recess channel transistor having...

Details Method of fabricating recess channel transistor having... Method of fabricating recess channel transistor having...

2011-04-12

2011-04-12

Kebede, Brook (Department: 2894)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE29201, C257SE29260

Reexamination Certificate

active

07923331

ABSTRACT:
Provided are a method of fabricating a recess channel transistor and a related semiconductor device. The method may include forming a first gate trench on a substrate, forming a dielectric spacer on a sidewall of the first gate trench, forming a second gate trench on the substrate under the first gate trench, and forming a gate electrode to fill the trenches. The dielectric spacer may remain between the gate electrode and the substrate.

REFERENCES:
patent: 5629226 (1997-05-01), Ohtsuki
patent: 6476444 (2002-11-01), Min
patent: 7670910 (2010-03-01), Kim et al.
patent: 2006/0211229 (2006-09-01), Kim
patent: 2007/0148934 (2007-06-01), Cho et al.
patent: 10-2007-0013726 (2007-01-01), None
patent: 10-2007-0047042 (2007-05-01), None
patent: 10-0718248 (2007-05-01), None
English language Abstract KR 10-2007-0010835 dated Jan. 24, 2007.

Affiliated with

Also associated with

Rating

Method of fabricating recess channel transistor having... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating recess channel transistor having..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating recess channel transistor having... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2685766