Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-11-08
2008-10-14
Pham, Thanhha (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S287000, C438S591000, C438S786000, C257SE21267
Reexamination Certificate
active
07435640
ABSTRACT:
A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.
REFERENCES:
patent: 6849512 (2005-02-01), Lo et al.
Chan Shu-Yen
Huang Kuo-Tai
Wang Yun-Ren
Yen Ying-Wei
Jianq Chyun IP Office
Pham Thanhha
United Microelectronics Corp.
LandOfFree
Method of fabricating gate structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating gate structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating gate structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3989795