Method of fabricating field effect transistors with...

Details Method of fabricating field effect transistors with... Method of fabricating field effect transistors with...

2011-04-19

2011-04-19

Chambliss, Alonzo (Department: 2892)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S258000, C257S219000, C257S288000, C257S368000, C257SE21599, C257SE21615

Reexamination Certificate

active

07927941

ABSTRACT:
Four regions (a narrow NMOS region, a wide NMOS region, a wide PMOS region, and a narrow PMOS region) are defined on a semiconductor substrate. Then, after a gate insulating film and a polysilicon film are sequentially formed on the semiconductor substrate, n-type impurities are introduced into the polysilicon film in the wide NMOS region. Next, by patterning the polysilicon film, gate electrodes are formed in the four regions. Then, n-type impurities are introduced into the gate electrodes in the narrow NMOS region and the wide NMOS region. As a result, an impurity concentration of the gate electrode in the narrow NMOS region becomes lower than that of the gate electrode in the wide NMOS region.

REFERENCES:
patent: 5354699 (1994-10-01), Ikeda et al.
patent: 5512497 (1996-04-01), Ikeda et al.
patent: 5998249 (1999-12-01), Liaw et al.
patent: 6362056 (2002-03-01), Tonti et al.
patent: 6437550 (2002-08-01), Andoh et al.
patent: 6573529 (2003-06-01), Asano et al.
patent: 6660597 (2003-12-01), Furukawa et al.
patent: 6767780 (2004-07-01), Sohn et al.
patent: 6898111 (2005-05-01), Yamauchi
patent: 6909133 (2005-06-01), Furukawa et al.
patent: 7015554 (2006-03-01), Nakaoka et al.
patent: 7217607 (2007-05-01), Furukawa et al.
patent: 7696084 (2010-04-01), Saeki et al.
patent: 7768039 (2010-08-01), Nomura et al.
patent: 2001/0025997 (2001-10-01), Onishi
patent: 2002/0179981 (2002-12-01), Asano et al.
patent: 2003/0002328 (2003-01-01), Lever
patent: 2003/0092233 (2003-05-01), Furukawa et al.
patent: 2004/0106289 (2004-06-01), Furukawa et al.
patent: 2004/0180489 (2004-09-01), Sohn et al.
patent: 2004/0183141 (2004-09-01), Nakaoka et al.
patent: 2005/0077548 (2005-04-01), Furukawa et al.
patent: 2005/0174870 (2005-08-01), Yamauchi
patent: 2006/0228860 (2006-10-01), Shinohara et al.
patent: 2007/0187764 (2007-08-01), Furukawa et al.
patent: 1388585 (2003-01-01), None
patent: 1420548 (2003-05-01), None
patent: 1523675 (2004-08-01), None
patent: 2342777 (2000-04-01), None
patent: 2000-077538 (2000-03-01), None
patent: 2000-124325 (2000-04-01), None
patent: 2001-267431 (2001-09-01), None
patent: 2001-274262 (2001-10-01), None
patent: 2001-284464 (2001-10-01), None
patent: 2004-247636 (2004-09-01), None
patent: 2005-051264 (2005-02-01), None
Japanese Office Action, Partial English-language translation, mailed May 14, 2009 from JP Patent Office for corresponding Japanese Application No. 2005-183920.
Chinese Office Action dated Feb. 22, 2008, issued in corresponding Chinese Application No. 200510114051.8.
Prior Art Information List
USPTO (Chambliss) Notice of Allowance Fees Due (PTOL-85); Examiner's Amendment mailed Mar. 19, 2010 for Parent U.S. Appl. No. 11/236,509 now Patent No. 7,768,039.
USPTO (Chambliss), Office Action, Non-Final Rejection, mailed Sep. 15, 2009 for Parent U.S. Appl. No. 11/236,509 now Patent No. 7,768,039.
USPTO (Chambliss), Office Action, Final Rejection, mailed Apr. 3, 2009 for Parent U.S. Appl. No. 11/236,509 now Patent No. 7,768,039.
USPTO (Chambliss), Office Action, Non-Final Rejection, mailed Jul. 18, 2008 for Parent U.S. Appl. No. 11/236,509 now Patent No. 7,768,039.
USPTO (Chambliss), Office Action, Requirement for Restriction/Election, mailed Feb. 11, 2008 for Parent U.S. Appl. No. 11/236,509 now Patent No. 7,768,039.

Affiliated with

Also associated with

Rating

Method of fabricating field effect transistors with... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating field effect transistors with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating field effect transistors with... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2671708