Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-09-02
1999-12-07
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438253, H01L 218242
Patent
active
059982551
ABSTRACT:
A fabricating method for a DRAM capacitor is provided. A DRAM is formed on a substrate, wherein a transistor has been formed. A first oxide layer is formed over the substrate and a contact window is formed on the first oxide layer to expose a source region of the transistor. Then, a bit line is formed in the contact window, wherein the bit line is connected to the source region of the transistor. A second oxide layer is formed on the bit line and the first oxide layer. Then, a third oxide layer is formed on the second oxide layer. A second contact window is further defined to expose a drain region of the transistor, wherein the drain region has a native oxide layer formed on it. Next, a first polysilicon film is formed on the exposed drain region of the second contact window. A high dosage implantation is used to remove the native oxide layer. Then, a second polysilicon layer is formed over the substrate. Finally, the finishing process followed is performed to complete the fabrication of a DRAM capacitor.
REFERENCES:
patent: 5789290 (1998-08-01), Sun
patent: 5902126 (1999-05-01), Hong et al.
Chou Peter
Kung Cheng-Chih
Tsai Jey
United Silicon Incorporated
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