Method of fabricating contact window of semiconductor device

Details Method of fabricating contact window of semiconductor device Method of fabricating contact window of semiconductor device

1999-03-24

2001-05-15

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S668000, C438S763000, C438S783000, C438S970000, C438S740000

Reexamination Certificate

active

06232225

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to a method of fabricating a semiconductor device, and more particularly, to a method of fabricating a small contact window having a large aspect ratio.
2. Description of the Related Art
As the level of integration of semiconductor devices increases, it becomes inevitable that the design rule of semiconductor devices is reduced. However, the reduction of the design rule of a device is not made at an identical or exact ratio with respect to all dimensions of the device. For example, the thicknesses of an interlayer insulative layer or a wiring layer involve vertical dimensions that cannot be reduced exactly in proportion to a change in design rule because other factors determining the thickness of each layer must be considered, e.g., breakdown voltage, parasitic capacity, current capacity, wiring resistance, etc. Thus, an aspect ratio is a ratio of the depth of the contact window to the width of the lowest portion of a small contact window.
When the aspect ratio is increased, either a contact window does not become completely formed or an incline phenomenon occurs when etching to form the contact window wherein the width of a bottom portion of a contact window becomes narrower than that of an upper portion of the contact window. When an incline phenomenon occurs, a contact area between the contact window and a lower conductive film is decreased, thereby precipitously increasing sheet resistance.
Particularly, in a capacitor over bit line (COB) structure where a capacitor is formed after forming a bit line, because the aspect ratio of a contact window for contacting a lower electrode of a capacitor with an active region formed on a semiconductor substrate is so large, and the contact area at the lowest portion of the contact window becomes significantly smaller, the sheet resistance is greatly increased.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.
SUMMARY OF THE INVENTION
According to an aspect of the present invention, a method of fabricating a contact window of a semiconductor device, comprises the steps of forming a lower conductive member on a semiconductor substrate; forming a first insulative film on the lower conductive member, the first insulative film being formed of an insulative material doped with impurities at a first level of concentration, the first insulative film having a wet etch rate that is proportional to the level of concentration of impurities; forming a second insulative film on the first insulative film, the second insulative film being formed of an insulative material doped with impurities at a second level of concentration that is lower than the first level of concentration of impurities, the second insulative film also having a wet etch rate that is proportional to the level of concentration of impurities; opening a contact window and exposing the lower conductive member by dry etching the second and first insulative films; and wet etching the second and first insulative films through which the contact window has been formed to increase an exposed area of the lower conductive member.
According to another aspect of the present invention, a method of fabricating a contact window of a semiconductor device, comprises the steps of forming a lower conductive member on a semiconductor substrate; forming an interlayer insulative film on the resulting structure; forming a conductive film pattern on the interlayer insulative film; forming a first insulative film on the entire surface of the resultant structure on which the conductive film pattern is formed, the first insulative film being formed of an insulative material doped with impurities at a first level of concentration; forming a second insulative film on the first insulative film, the second insulative film being formed of an insulative material doped with impurities at a second level of concentration the second insulative film also having a wet etch rate that is proportional to the level of concentration of impurities that is lower than the first level of concentration; opening a contact window and exposing the lower conductive member by dry etching the second and first insulative films; and increasing an exposed area of the lower conductive member by wet etching the second and first insulative films through which the contact window has been formed.


REFERENCES:
patent: 5792703 (1998-08-01), Bronner et al.

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